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Radeon™ hd 3850 chipset features and specifications 666 million transistors on 55nm fabrication process pci express 2.0 X16 bus interface 256-bit gddr3/gddr4 memory interface bus memory controller -fully distributed design with 512-bit internal ring bus for memory reads and writes microsoft® directx® 10.1 Support - 2x/4x/8x modes. - Sparse multi-sample algorithm with gamma correction, programmable sample patterns, and centroid sampling. - Temporal anti-aliasing. - Adaptive anti-aliasing mode. - Shader model 4.1 - 32-Bit floating point texture filtering - indexed cube map arrays - independent blend modes per render target - pixel coverage sample masking - read/write multi-sample surfaces with shaders - gather4 texture fetching dynamic geometry acceleration - high performance vertex cache - programmable tessellation unit - accelerated geometry shader path for geometry amplification - memory read/write cache for improved stream output performance opengl 2.0 Support unified superscalar shader architecture - 320 stream processing units * dynamic load balancing and resource allocation for vertex, geometry, and pixel shaders * common instruction set and texture unit access supported for all types of shaders * dedicated branch execution units and texture address processors - 128-bit floating point precision for all operations - command processor for reduced cpu overhead - shader instruction and constant caches - up to 80 texture fetches per clock cycle - up to 128 textures per pixel - fully associative multi-level texture cache design - dxtc and 3dc+ texture compression - high resolution texture support (up to 8192 x 8192) - fully associative texture z/stencil cache designs - double-sided hierarchical z/stencil buffer - early z test, re-z, z range optimization, and fast z clear - lossless z & stencil compression (up to 128:1) - lossless color compression (up to 8:1) - 8 render targets (mrts) with anti-aliasing support |
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